AI AGENTS DESIGN CHIPS 2.6X FASTER BY WORKING IN HIGH-LEVEL HLS BEFORE DROPPING TO RTL

Summary from the TLDR Hardware newsletter

Most LLM chip-design agents work directly at RTL, the low-level hardware description that specifies exact circuit behavior, which forces the agent to grapple with fine-grained optimization details from the very start. This paper tests whether letting agents design at a higher abstraction level first, High-Level Synthesis (HLS), which compiles from something closer to software code down into RTL, produces better results, comparing four workflows including a combined approach called Agent-based HLS with RTL Refinement (AHRR): the agent designs in HLS, then a separate refinement pass drops down to RTL to recover optimizations the higher-level abstraction misses.