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TLDR Hardware

TLDR HARDWARE 2026-08-05

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01GENERAL

ELON MUSK SAYS SPACEX WILL BUILD EXCLUSIVELY WITH NVIDIA, TOUTS SPACE-BASED AI SERVERS

Elon Musk announced that SpaceX will standardize exclusively on Nvidia hardware to power its expanding terrestrial data centers and upcoming orbital AI constellation. During SpaceX's Q2 conference call, Musk revealed a partnership with Nvidia to equip "Starmind" AI satellites with Vera Rubin architectures launching in 2027. Designed to operate in space and on Earth, SpaceX's custom rack designs prioritize power and cooling systems, targeting up to 20 gigawatts of infrastructure capacity to support Grok model scaling while bypassing terrestrial land constraints.

finance.yahoo.com3 min read

HP, ASUS, AND ACER BEGIN USING CXMT MEMORY CHIPS

Major computer makers HP, Asus, and Acer have quietly begun sourcing DRAM memory chips from China's CXMT for select budget laptops. Triggered by a global memory deficit as leading suppliers Samsung, SK Hynix, and Micron shift manufacturing capacity to advanced High Bandwidth Memory, PC vendors are turning to alternative suppliers to keep production lines moving.

asia.nikkei.com3 min read

SAMSUNG REVEALS NEW 3D-MEMORY ROADMAP, BETTING ON STACKING MEMORY DIRECTLY ATOP AI CHIPS

At FMS 2026, Samsung unveiled zHBM, a concept architecture that vertically stacks HBM directly on top of an AI accelerator instead of placing it alongside the chip, shortening the distance data travels and targeting roughly 8x the performance of next-gen HBM5 alongside more than 10x the memory density, using advanced wafer-bonding technology. Samsung also showed zNAND-O, an edge-AI-focused NAND design combining high space efficiency with low latency, and V10 BV-NAND, a bonding-based V-NAND architecture breaking past 400 layers for the first time, a roughly 58% density jump over its prior generation.

links.tldrnewsletter.com4 min read

INTEL FOUNDRY ENGINEERS BLUEPRINT FOR HYPER-LARGE FORM FACTOR AI CHIPS

At the IEEE ECTC conference, Intel Foundry unveiled novel packaging techniques designed to manufacture hyper-large form factor (HLFF) silicon measuring 240mm by 240mm. Addressing the physical limits of single-reticle chips, Intel's design blueprint combines compute die arrays with High-Bandwidth Memory (HBM) using EMIB-T embedded silicon bridges. To maintain reliability across massive package footprints, multi-point underfill material is introduced for dispensing material alongside thick stiffener rings and glass-core substrates that eliminate substrate warping and structural voids during thermal curing.

semiengineering.com4 min read

WHEN EXPRESSIVE HUMANOID ROBOTS MESS UP, PEOPLE'S BRAINS TRIGGER A TRUST-WITHDRAWAL RESPONSE

Researchers found that when an expressive, animated humanoid robot made a social error, participants' brains showed coordinated activity linked to rising oxytocin, which predicted falling trust and less influence over their choices, an effect absent when the robot was stationary and expressionless. It undercuts the common design assumption that making robots more lifelike and expressive automatically earns more trust, suggesting expressiveness can backfire when the robot doesn't reliably deliver on the social behavior it signals.

theconversation.com2 min read

PRISMML SHRINKS A 27B-PARAMETER MODEL TO 3.9GB, SMALL ENOUGH TO RUN FREE ON AN IPHONE

Caltech-rooted startup PrismML compressed a 27-billion-parameter model down to just 3.9GB, small enough to run locally on an iPhone 17 Pro's neural accelerators, or on iPad, Mac, and PC, while retaining roughly 90% of the original's performance. A model of this size normally can't fit in a phone's usable memory at all, making this a real test of how far Apple's on-device silicon can be pushed. Apple has confirmed early talks with PrismML about the technology.

finance.yahoo.com2 min read

02MISCELLANEOUS

OLIX RAISES $312M AT $3.3B VALUATION, APPOINTS NICK MCKEOWN TO BOARD

Optical networking startup OLIX has secured a $312 million Series B funding round at a $3.3 billion valuation to accelerate its specialized AI inference silicon. OLIX's X-1 platform uses custom DX-1 decode accelerators with high-speed SRAM and rack-scale optical interconnects instead of scarce High-Bandwidth Memory (HBM), drastically lowering latency for ten-trillion-parameter AI models.

olix.com3 min read

HUAWEI WARNS OF PHYSICAL SCALING LIMIT FACING NVIDIA

Huawei chief semiconductor scientist Liao Heng warned that Western chipmaker Nvidia is rapidly approaching an inescapable physical transistor scaling limit. Speaking in a rare interview, Liao argued that continually stacking massive compute dies with high-bandwidth memory creates severe reliability constraints. In response, Huawei is championing its proprietary "Tau Scaling Law" and LogicFolding architecture. The design approach prioritizes ultra-fast inter-component transmission speeds over brute-force transistor density, aiming to narrow the hardware performance gap without relying on advanced EUV lithography tools.

aiweekly.co4 min read