JANE STREET'S NEW PUZZLE: REVERSE ENGINEER AN ASIC FROM ITS RAW CHIP LAYOUT

Summary from the TLDR Hardware newsletter

Jane Street released a public puzzle, handing out only the final GDS file for a chip it designed, the raw geometric layout of every transistor and metal layer that a foundry uses to fabricate silicon, with nothing labeled. Solvers have to recover a netlist (the underlying logic gates and how they connect) directly from that layout, figure out what the circuit actually does, then use it to extract a hidden output value, all using free open-source tools like KLayout or Magic VLSI.